Verification
ERC vs DRC: what each PCB check proves
PCBBench editorial · Published October 14, 2026 · Editorial policy
ERC checks schematic connections and pin-type rules. DRC checks board geometry and connectivity against configured physical rules. Use both, and keep functional requirements separate from either report.
Different artifacts, different questions
ERC operates on the schematic's electrical representation. DRC evaluates the PCB and its rule configuration. A schematic can be logically connected while the board has an unrouted net; a physically clean board can implement the wrong circuit.
A clean report depends on configuration
Record severity settings, net classes, custom rules and exclusions. Compare results under the same settings. Changing a rule to eliminate a finding changes the test, not necessarily the underlying design.
Build a release sequence
Check the schematic, synchronize the board, refill zones, check board parity and DRC, then inspect the exports from that revision. Add device-specific and functional checks for requirements outside either rule system.
Practical checklist
- ERC: review pin and power connectivity.
- DRC: review board geometry and intended connections.
- Preserve configurations and exceptions.
- Check schematic-board parity.
- Verify behavior independently.
A concrete example
An ERC-clean circuit is routed onto a PCB.
- Evidence to accept
- Both representations agree and the final board passes the chosen physical rules.
- Evidence that is insufficient
- ERC alone is described as proof that all PCB connections were routed.
Common questions
Which check should run first?
Usually schematic checks precede board work, then both are revisited when changes affect their inputs.
Can either check prove product functionality?
Neither report establishes all functional, thermal, mechanical or assembly requirements.
Primary references and further reading
Use the matching device documentation and project configuration when applying this checklist. These references explain the underlying tools and evaluation approaches.
How this fits PCBBench
The AI PCB design review benchmark describes the proposed inputs, outputs and checks for this capability. The pilot snapshot contains partial measured attempts; it is not a finished ranking.
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